PIC18LF4682-I/ML View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF4682-I/ML

28/40/44-Pin Enhanced Flash Microcontrollers with ECAN™ Technology, 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2682/2685/4682/4685

FIGURE 17-27: BUS COLLISION DURING START CONDITION (SCL = 0)

SDA = 0, SCL = 1

SDA

TBRG

TBRG

SCL

SEN

BCLIF

Set SEN, enable Start

sequence if SDA = 1, SCL = 1

SCL = 0 before BRG time-out,

bus collision occurs. Set BCLIF.

S

‘0’

SSPIF ‘0’

SCL = 0 before SDA = 0,

bus collision occurs. Set BCLIF.

Interrupt cleared

in software

‘0’

‘0’

FIGURE 17-28: BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION

SDA = 0, SCL = 1

Less than TBRG

Set S

TBRG

SDA SDA pulled low by other master.

Reset BRG and assert SDA.

Set SSPIF

SCL

SEN

BCLIF

S

SCL pulled low after BRG

time-out

Set SEN, enable START

sequence if SDA = 1, SCL = 1

‘0’

S

SSPIF

SDA = 0, SCL = 1,

set SSPIF

Interrupts cleared

in software

© 2007 Microchip Technology Inc.

Preliminary

DS39761B-page 223

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