PIC18F44K20-I/SP View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F44K20-I/SP
Microchip Technology
PIC18F44K20-I/SP Datasheet PDF : 456 Pages
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PIC18F2XK20/4XK20
FIGURE 26-15:
SS
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
82
70
SCK
(CKP = 0)
83
71
72
SCK
(CKP = 1)
80
SDO
MSb
bit 6 - - - - - -1
LSb
75, 76
77
SDI
MSb In
bit 6 - - - -1
LSb In
74
Note: Refer to Figure 26-4 for load conditions.
TABLE 26-17: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
70 TssL2scH, SS to SCK or SCK Input
TssL2scL
TCY
—
71 TscH
71A
SCK Input High Time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
72 TscL
72A
SCK Input Low Time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
73A Tb2b
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 TCY + 40 —
74 TscH2diL, Hold Time of SDI Data Input to SCK Edge
TscL2diL
100
—
75 TdoR
SDO Data Output Rise Time
—
25
76 TdoF
SDO Data Output Fall Time
—
25
77 TssH2doZ SS to SDO Output High-Impedance
10
50
78 TscR
SCK Output Rise Time
(Master mode)
—
25
79 TscF
SCK Output Fall Time (Master mode)
—
25
80 TscH2doV, SDO Data Output Valid after SCK Edge
TscL2doV
—
50
82 TssL2doV SDO Data Output Valid after SS Edge
—
50
83 TscH2ssH SS after SCK Edge
,
TscL2ssH
1.5 TCY + 40 —
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
ns
ns
ns (Note 1)
ns
ns (Note 1)
ns (Note 2)
ns
ns
ns
ns
ns
ns
ns
ns
ns
2010 Microchip Technology Inc.
DS41303G-page 395
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