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PIC18F2455T-I/ML View Datasheet(PDF) - Microchip Technology

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PIC18F2455T-I/ML Datasheet PDF : 438 Pages
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PIC18F2455/2550/4455/4550
22.9 Analog Input Connection
Considerations
A simplified circuit for an analog input is shown in
Figure 22-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. The analog input, therefore, must be between
VSS and VDD. If the input voltage deviates from this
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latch-up condition may
occur. A maximum source impedance of 10 kΩ is
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
FIGURE 22-4:
COMPARATOR ANALOG INPUT MODEL
VDD
RS < 10k
AIN
VA
CPIN
5 pF
VT = 0.6V
VT = 0.6V
RIC
ILEAKAGE
±500 nA
Comparator
Input
VSS
Legend:
CPIN
=
VT
=
ILEAKAGE =
RIC
=
RS
=
VA
=
Input Capacitance
Threshold Voltage
Leakage Current at the pin due to various junctions
Interconnect Resistance
Source Impedance
Analog Voltage
TABLE 22-1: REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
CMCON
C2OUT C1OUT C2INV C1INV
CIS
CM2
CM1
CM0
55
CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0
55
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
53
PIR2
OSCFIF
CMIF
USBIF
EEIF
BCLIF HLVDIF TMR3IF CCP2IF
56
PIE2
OSCFIE CMIE USBIE EEIE BCLIE HLVDIE TMR3IE CCP2IE 56
IPR2
PORTA
LATA
TRISA
OSCFIP CMIP USBIP EEIP BCLIP HLVDIP TMR3IP CCP2IP 56
RA6(1)
RA5
RA4
RA3
RA2
RA1
RA0
56
LATA6(1) LATA5 LATA4 LATA3 LATA2 LATA1 LATA0
56
TRISA6(1) TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
56
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module.
Note 1: PORTA<6> and its direction and latch bits are individually configured as port pins based on various
oscillator modes. When disabled, these bits read as ‘0’.
© 2009 Microchip Technology Inc.
DS39632E-page 279

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