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PIC18F2455T-I/ML View Datasheet(PDF) - Microchip Technology

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PIC18F2455T-I/ML Datasheet PDF : 438 Pages
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PIC18F2455/2550/4455/4550
REGISTER 25-15: WDTCON: WATCHDOG TIMER CONTROL REGISTER
U-0
bit 7
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
SWDTEN(1)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-1
bit 0
Unimplemented: Read as ‘0
SWDTEN: Software Controlled Watchdog Timer Enable bit(1)
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Note 1: This bit has no effect if the Configuration bit, WDTEN, is enabled.
TABLE 25-2: SUMMARY OF WATCHDOG TIMER REGISTERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
RCON
IPEN SBOREN(1)
RI
TO
PD
POR
BOR
54
WDTCON
— SWDTEN 54
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
Note 1: The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
DS39632E-page 304
© 2009 Microchip Technology Inc.

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