PIC18F4580ISOSQTP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F4580ISOSQTP

28/40/44-Pin Enhanced Flash Microcontrollers with ECAN™ Technology, 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2480/2580/4480/4580

REGISTER 25-10: CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)

U-0

—

bit 7

U-0

U-0

U-0

R/C-1

R/C-1

R/C-1

R/C-1

—

—

—

EBTR3(1,2) EBTR2(1,2)

EBTR1(2)

EBTR0(2)

bit 0

Legend:

R = Readable bit

C = Clearable bit

-n = Value when device is unprogrammed

U = Unimplemented bit, read as ‘0’

u = Unchanged from programmed state

bit 7-4

bit 3

bit 2

bit 1

bit 0

Unimplemented: Read as ‘0’

EBTR3: Table Read Protection bit(1,2)

1 = Block 3 (006000-007FFFh) not protected from table reads executed in other blocks

0 = Block 3 (006000-007FFFh) protected from table reads executed in other blocks

EBTR2: Table Read Protection bit(1,2)

1 = Block 2 (004000-005FFFh) not protected from table reads executed in other blocks

0 = Block 2 (004000-005FFFh) protected from table reads executed in other blocks

EBTR1: Table Read Protection bit(2)

1 = Block 1 (002000-003FFFh) not protected from table reads executed in other blocks

0 = Block 1 (002000-003FFFh) protected from table reads executed in other blocks

EBTR0: Table Read Protection bit(2)

1 = Block 0 (000800-001FFFh) not protected from table reads executed in other blocks

0 = Block 0 (000800-001FFFh) protected from table reads executed in other blocks

Note 1: Unimplemented in PIC18FX480 devices; maintain this bit set.

2: It is recommended to enable the corresponding CPx bit to protect the block from external read operations.

REGISTER 25-11: CONFIG7H: CONFIGURATION REGISTER 7 HIGH (BYTE ADDRESS 30000Dh)

U-0

R/C-1

U-0

U-0

U-0

U-0

U-0

U-0

—

EBTRB(1)

—

—

—

—

—

—

bit 7

bit 0

Legend:

R = Readable bit

C = Clearable bit

-n = Value when device is unprogrammed

U = Unimplemented bit, read as ‘0’

u = Unchanged from programmed state

bit 7

bit 6

bit 5-0

Unimplemented: Read as ‘0’

EBTRB: Boot Block Table Read Protection bit(1)

1 = Boot Block (000000-0007FFh) not protected from table reads executed in other blocks

0 = Boot Block (000000-0007FFh) protected from table reads executed in other blocks

Unimplemented: Read as ‘0’

Note 1: It is recommended to enable the corresponding CPx bit to protect the block from external read operations.

DS39637D-page 356

© 2009 Microchip Technology Inc.

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