PIC18LF4580ISOSQTP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF4580ISOSQTP

28/40/44-Pin Enhanced Flash Microcontrollers with ECAN™ Technology, 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2480/2580/4480/4580

FIGURE 28-14: EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)

SS

SCK

(CKP = 0)

SCK

(CKP = 1)

SDO

SDI

70

71

72

83

78

79

80

MSb

79

bit 6 - - - - - -1

MSb In

74

73

75, 76

bit 6 - - - -1

78

LSb

77

LSb In

TABLE 28-16: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)

Param

No.

Symbol

Characteristic

Min

Max Units Conditions

70

TSSL2SCH SS ↓ to SCK ↓ or SCK ↑ Input

,

TSSL2SCL

3 TCY

—

71

TSCH

SCK Input High Time

Continuous 1.25 TCY + 30 —

71A

Single Byte

40

—

72

TSCL

SCK Input Low Time

Continuous 1.25 TCY + 30 —

72A

Single Byte

40

—

73

TDIV2SCH, Setup Time of SDI Data Input to SCK Edge

TDIV2SCL

20

—

73A TB2B

Last Clock Edge of Byte1 to the First Clock Edge of Byte 2 1.5 TCY + 40 —

74

TSCH2DIL, Hold Time of SDI Data Input to SCK Edge

TSCL2DIL

40

—

75

TDOR

SDO Data Output Rise Time

PIC18FXXXX

—

25

PIC18LFXXXX

45

76

TDOF

SDO Data Output Fall Time

—

25

77

TSSH2DOZ SS ↑ to SDO Output High-Impedance

10

50

80

TSCH2DOV SDO Data Output Valid after SCK

PIC18FXXXX

—

50

,

Edge

TSCL2DOV

PIC18LFXXXX

100

83

TscH2ssH SS ↑ after SCK Edge

,

TscL2ssH

1.5 TCY + 40 —

Note 1: Requires the use of Parameter #73A.

2: Only if Parameter #71A and #72A are used.

ns

ns

ns (Note 1)

ns

ns (Note 1)

ns

ns (Note 2)

ns

ns

ns VDD = 2.0V

ns

ns

ns

ns VDD = 2.0V

ns

© 2009 Microchip Technology Inc.

DS39637D-page 449

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