PIC18F44J10T-I/ML(2009) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F44J10T-I/ML
(Rev.:2009)
(Rev.:2009)
Microchip Technology
PIC18F44J10T-I/ML Datasheet PDF : 368 Pages
| |||
PIC18F45J10 FAMILY
24.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 24-4:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
Q2
Q3
Q4
Q1
OSC1
CLKO
1
3
3
4
4
2
TABLE 24-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
1
2
3
4
Note 1:
FOSC
External CLKI Frequency(1)
DC
Oscillator Frequency(1)
4
TOSC
External CLKI Period(1)
25
40
MHz EC Oscillator mode
25
MHz HS Oscillator mode
—
ns EC Oscillator mode
Oscillator Period(1)
25
250
ns HS Oscillator mode
TCY
Instruction Cycle Time(1)
100
—
ns TCY = 4/FOSC, Industrial
TOSL, External Clock in (OSC1)
10
TOSH
High or Low Time
—
ns EC Oscillator mode
TOSR, External Clock in (OSC1)
—
TOSF
Rise or Fall Time
7.5
ns EC Oscillator mode
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations.
All specified values are based on characterization data for that particular oscillator type under standard
operating conditions with the device executing code. Exceeding these specified limits may result in an
unstable oscillator operation and/or higher than expected current consumption. All devices are tested to
operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock input
is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
© 2009 Microchip Technology Inc.
DS39682E-page 319
Share Link: 