PIC18LF45J10-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF45J10-I/SP

28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC18F45J10 FAMILY

FIGURE 1-2:

PIC18F44J10/45J10 (40/44-PIN) BLOCK DIAGRAM

Table Pointer<21>

inc/dec logic

21

20

Address Latch

Program Memory

(16/32 Kbytes)

Data Latch

8

Data Bus<8>

88

PCLATU PCLATH

PCU PCH PCL

Program Counter

31 Level Stack

STKPTR

Table Latch

Data Latch

Data Memory

(3.9 Kbytes)

Address Latch

12

Data Address<12>

4

BSR

12

FSR0

FSR1

FSR2

4

Access

Bank

12

inc/dec

logic

ROM Latch

Instruction Bus <16>

IR

Address

Decode

PORTA

PORTB

PORTC

VDDCORE

OSC1

OSC2

T1OSI

T1OSO

MCLR

VDD, VSS

Instruction

Decode and

Control

State Machine

Control Signals

8

PRODH PRODL

Internal

Oscillator

Block

INTRC

Oscillator

Single-Supply

Programming

In-Circuit

Debugger

Power-up

Timer

Oscillator

Start-up Timer

Power-on

Reset

Watchdog

Timer

Brown-out(2)

Reset

Fail-Safe

Clock Monitor

3

BITOP

8

8 x 8 Multiply

8

W

8

8

8

8

ALU<8>

8

Precision

Band Gap

Reference

PORTD

PORTE

RA0/AN0

RA1/AN1

RA2/AN2/VREF-/CVREF

RA3/AN3/VREF+

RA5/AN4/SS1/C2OUT

RB0/INT0/FLT0/AN12

RB1/INT1/AN10

RB2/INT2/AN8

RB3/AN9/CCP2(1)

RB4/KBI0/AN11

RB5/KBI1/T0CKI/C1OUT

RB6/KBI2/PGC

RB7/KBI3/PGD

RC0/T1OSO/T1CKI

RC1/T1OSI/CCP2(1)

RC2/CCP1/P1A

RC3/SCK1/SCL1

RC4/SDI1/SDA1

RC5/SDO1

RC6/TX/CK

RC7/RX/DT

RD0/PSP0/SCK2/SCL2

RD1/PSP1/SDI2/SDA2

RD2/PSP2/SDO2

RD3/PSP3/SS2

RD4/PSP4

RD5/PSP5/P1B

RD6/PSP6/P1C

RD7/PSP7/P1D

RE0/RD/AN5

RE1/WR/AN6

RE2/CS/AN7

BOR(2)

Timer0

Timer1

Timer2

ADC

10-bit

Comparator

ECCP1

CCP2

MSSP

EUSART

Note 1: CCP2 is multiplexed with RC1 when configuration bit CCP2MX is set, or RB3 when CCP2MX is not set.

2: BOR is not available in PIC18LF2XJ10/4XJ10 devices.

© 2007 Microchip Technology Inc.

Preliminary

DS39682C-page 11

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