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PIC18LF45J10T-I/SP View Datasheet(PDF) - Microchip Technology

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PIC18LF45J10T-I/SP Datasheet PDF : 358 Pages
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PIC18F45J10 FAMILY
EXAMPLE 16-1: CALCULATING BAUD RATE ERROR
For a device with FOSC of 16 MHz, desired baud rate of 9600, Asynchronous mode, 8-bit BRG:
Desired Baud Rate = FOSC/(64 ([SPBRGH:SPBRG] + 1))
Solving for SPBRGH:SPBRG:
X = ((FOSC/Desired Baud Rate)/64) – 1
= ((16000000/9600)/64) – 1
= [25.042] = 25
Calculated Baud Rate = 16000000/(64 (25 + 1))
= 9615
Error
= (Calculated Baud Rate – Desired Baud Rate)/Desired Baud Rate
= (9615 – 9600)/9600 = 0.16%
TABLE 16-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2 Bit 1
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR
BAUDCON ABDOVF RCIDL
SCKP BRG16
WUE
SPBRGH EUSART Baud Rate Generator Register High Byte
SPBRG EUSART Baud Rate Generator Register Low Byte
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
Bit 0
TX9D
RX9D
ABDEN
Reset Values
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DS39682C-page 192
Preliminary
© 2007 Microchip Technology Inc.

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