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PIC18F44J50-I/SPSQTP View Datasheet(PDF) - Microchip Technology

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PIC18F44J50-I/SPSQTP Datasheet PDF : 562 Pages
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PIC18F46J50 FAMILY
TABLE 1-3: PIC18F2XJ50 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
28-SPDIP/
Pin Buffer
SSOP/ 28-QFN Type Type
SOIC
Description
MCLR
1
26
I
ST Master Clear (Reset) input. This pin is an
active-low Reset to the device.
OSC1/CLKI/RA7
OSC1
CLKI
RA7(1)
9
6
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source
input. ST buffer when configured in RC mode;
CMOS otherwise. Main oscillator input
connection.
I CMOS External clock source input; always associated
with pin function, OSC1 (see related
OSC1/CLKI pins).
I/O TTL
Digital I/O.
OSC2/CLKO/RA6
OSC2
CLKO
RA6(1)
10
7
Oscillator crystal or clock output.
O — Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
O—
Main oscillator feedback output connection.
In RC mode, OSC2 pin outputs CLKO, which
has 1/4 the frequency of OSC1 and denotes
the instruction cycle rate.
I/O TTL
Digital I/O.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
DIG = Digital output
CMOS
Analog
O
OD
I2C™
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
= Open-Drain, I2C-specific
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
DS39931D-page 16
2011 Microchip Technology Inc.

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