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PIC18LF44J50-I/SP301 View Datasheet(PDF) - Microchip Technology

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Description
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PIC18LF44J50-I/SP301 Datasheet PDF : 562 Pages
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PIC18F46J50 FAMILY
REGISTER 13-3: TCLKCON: TIMER CLOCK CONTROL REGISTER (BANKED F52h)
U-0
U-0
U-0
R-0
U-0
T1RUN
bit 7
U-0
R/W-0
T3CCP2
R/W-0
T3CCP1
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
bit 4
bit 3-2
bit 1-0
Unimplemented: Read as ‘0
T1RUN: Timer1 Run Status bit
1 = Device is currently clocked by T1OSC/T1CKI
0 = System clock comes from an oscillator other than T1OSC/T1CKI
Unimplemented: Read as ‘0
T3CCP<2:1>: ECCP Timer Assignment bits
10 = ECCP1 and ECCP2 both use Timer3 (capture/compare) and Timer4 (PWM)
01 = ECCP1 uses Timer1 (compare/capture) and Timer2 (PWM); ECCP2 uses Timer3 (capture/compare)
and Timer4 (PWM)
00 = ECCP1 and ECCP2 both use Timer1 (capture/compare) and Timer2 (PWM)
DS39931D-page 202
2011 Microchip Technology Inc.

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