PIC18F44K22-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F44K22-I/SO

28/40/44-Pin, Low-Power,High-Performance Microcontrollers with XLP Technology

Microchip Technology 

PIC18(L)F2X/4XK22

TABLE 1-2: PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Number

PDIP,

SOIC

QFN

Pin Name

Pin Buffer

Type Type

Description

9

6 RA7/CLKI/OSC1

RA7

I/O TTL Digital I/O.

CLKI

I CMOS External clock source input. Always associated with

pin function OSC1.

OSC1

I

ST Oscillator crystal input or external clock source input

ST buffer when configured in RC mode; CMOS

otherwise.

21

18 RB0/INT0/CCP4/FLT0/SRI/SS2/AN12

RB0

I/O TTL Digital I/O.

INT0

I

ST External interrupt 0.

CCP4

I/O ST Capture 4 input/Compare 4 output/PWM 4 output.

FLT0

I

ST PWM Fault input for ECCP Auto-Shutdown.

SRI

I

ST SR Latch input.

SS2

I

TTL SPI slave select input (MSSP2).

AN12

I Analog Analog input 12.

22

19 RB1/INT1/P1C/SCK2/SCL2/C12IN3-/AN10

RB1

I/O TTL Digital I/O.

INT1

I

ST External interrupt 1.

P1C

O CMOS Enhanced CCP1 PWM output.

SCK2

SCL2

I/O ST Synchronous serial clock input/output for SPI mode

(MSSP2).

I/O

ST Synchronous serial clock input/output for I2C™ mode

(MSSP2).

C12IN3-

I Analog Comparators C1 and C2 inverting input.

AN10

I Analog Analog input 10.

23

20 RB2/INT2/CTED1/P1B/SDI2/SDA2/AN8

RB2

I/O TTL Digital I/O.

INT2

I

ST External interrupt 2.

CTED1

I

ST CTMU Edge 1 input.

P1B

O CMOS Enhanced CCP1 PWM output.

SDI2

SDA2

I

ST SPI data in (MSSP2).

I/O

ST I2C™ data I/O (MSSP2).

AN8

I Analog Analog input 8.

24

21 RB3/CTED2/P2A/CCP2/SDO2/C12IN2-/AN9

RB3

I/O TTL Digital I/O.

CTED2

I

ST CTMU Edge 2 input.

P2A

CCP2(2)

O CMOS Enhanced CCP2 PWM output.

I/O ST Capture 2 input/Compare 2 output/PWM 2 output.

SDO2

O

— SPI data out (MSSP2).

C12IN2-

I Analog Comparators C1 and C2 inverting input.

AN9

I Analog Analog input 9.

Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;

I = Input; O = Output; P = Power.

Note 1: Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are set.

2: Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are clear.

DS41412A-page 18

Preliminary

 2010 Microchip Technology Inc.

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