PIC18LF46K22-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF46K22-I/SP

28/40/44-Pin, Low-Power,High-Performance Microcontrollers with XLP Technology

Microchip Technology 

PIC18(L)F2X/4XK22

TABLE 1-2: PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Number

PDIP,

SOIC

QFN

Pin Name

Pin Buffer

Type Type

Description

13

10 RC2/CTPLS/P1A/CCP1/T5CKI/AN14

RC2

I/O TTL Digital I/O.

CTPLS

O

— CTMU pulse generator output.

P1A

O CMOS Enhanced CCP1 PWM output.

CCP1

I/O ST Capture 1 input/Compare 1 output/PWM 1 output.

T5CKI

I

ST Timer5 clock input.

AN14

I Analog Analog input 14.

14

11 RC3/SCK1/SCL1/AN15

RC3

I/O TTL Digital I/O.

SCK1

SCL1

I/O ST Synchronous serial clock input/output for SPI mode

(MSSP2).

I/O

ST Synchronous serial clock input/output for I2C™ mode

(MSSP2).

AN15

I Analog Analog input 15.

15

12 RC4/SDI1/SDA1/AN16

RC4

I/O TTL Digital I/O.

SDI1

SDA1

I

ST SPI data in (MSSP1).

I/O

ST I2C™ data I/O (MSSP1).

AN16

I Analog Analog input 16.

16

13 RC5/SDO1/AN17

RC5

I/O TTL Digital I/O.

SDO1

O

— SPI data out (MSSP1).

AN17

I Analog Analog input 17.

17

14 RC6/P3A/CCP3/TX1/CK1/AN18

RC6

P3A(2)

CCP3(2)

I/O TTL Digital I/O.

O CMOS Enhanced CCP3 PWM output.

I/O ST Capture 3 input/Compare 3 output/PWM 3 output.

TX1

O

— EUSART 1 asynchronous transmit.

CK1

I/O ST EUSART 1 synchronous clock (see related RXx/DTx).

AN18

I Analog Analog input 18.

18

15 RC7/P3B/RX1/DT1/AN19

RC7

I/O TTL Digital I/O.

P3B

O CMOS Enhanced CCP3 PWM output.

RX1

I

ST EUSART 1 asynchronous receive.

DT1

I/O ST EUSART 1 synchronous data (see related TXx/CKx).

AN19

I Analog Analog input 19.

1

26 RE3/VPP/MCLR

RE3

I

ST Digital input.

VPP

P

Programming voltage input.

MCLR

I

ST Active-Low Master Clear (device Reset) input.

Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;

I = Input; O = Output; P = Power.

Note 1: Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are set.

2: Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are clear.

DS41412A-page 20

Preliminary

 2010 Microchip Technology Inc.

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