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PIC18F26K22-I/SO View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC18F26K22-I/SO Datasheet PDF : 494 Pages
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PIC18(L)F2X/4XK22
FIGURE 20-1:
DIVSRCLK BLOCK DIAGRAM
3
SRCLK<2:0>
Peripheral
Clock
Tosc
Programmable
SRCLK divider
1:4 to 1:512
t0
t0+4
t0+8
t0+12
DIVSRCLK
4-512 cycles
...
SRCLK<2:0> = "001"
1:8
FIGURE 20-2:
SR LATCH SIMPLIFIED BLOCK DIAGRAM
SRPS
Pulse
Gen(2)
SRLEN
SRQEN
SRI
SRSPE
DIVSRCLK
SRSCKE
SYNCC2OUT(3)
SRSC2E
SYNCC1OUT(3)
SRSC1E
SRPR
Pulse
Gen(2)
SQ
SR
Latch(1)
SRI
SRRPE
DIVSRCLK
SRRCKE
SYNCC2OUT(3)
SRRC2E
SYNCC1OUT(3)
SRRC1E
RQ
SRLEN
SRNQEN
Note 1:
2:
3:
If R = 1 and S = 1 simultaneously, Q = 0, Q = 1
Pulse generator causes a pulse width of 2 TOSC clock cycles.
Name denotes the connection point at the comparator output.
SRQ
SRNQ
DS41412A-page 336
Preliminary
2010 Microchip Technology Inc.

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