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PIC18F44K22-I/SO View Datasheet(PDF) - Microchip Technology

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PIC18F44K22-I/SO Datasheet PDF : 494 Pages
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PIC18(L)F2X/4XK22
REGISTER 2-2: OSCCON2: OSCILLATOR CONTROL REGISTER 2
R-0/0
R-0/q
U-0
R/W-0/0
R/W-0/u
R/W-1/1
PLLRDY SOSCRUN
MFIOSEL SOSCGO(1) PRISD
bit 7
R-x/u
MFIOFS
R-0/0
LFIOFS
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
q = depends on condition
bit 7
PLLRDY: PLL Run Status bit
1 = System clock comes from 4xPLL
0 = System clock comes from an oscillator, other than 4xPLL
bit 6
SOSCRUN: SOSC Run Status bit
1 = System clock comes from secondary SOSC
0 = System clock comes from an oscillator, other than SOSC
bit 5
Unimplemented: Read as ‘0’.
bit 4
MFIOSEL: MFINTOSC Select bit
1 = MFINTOSC is used in place of HFINTOSC frequencies of 500 kHz, 250 kHz and 31.25 kHz
0 = MFINTOSC is not used
bit 3
SOSCGO(1): Oscillator Start Control bit
1 = Secondary oscillator is running even if no other sources are requesting it
0 = Secondary oscillator is shut off if no other sources are requesting it. When the SOSC is selected
to run from a digital clock input, rather than an external crystal, this bit has no effect.
bit 2
PRISD: Primary Oscillator Drive Circuit Shutdown bit
1 = Oscillator drive circuit on
0 = Oscillator drive circuit off (zero power)
bit 1
MFIOFS: MFINTOSC Frequency Stable bit
1 = MFINTOSC is stable
0 = MFINTOSC is not stable
bit 0
LFIOFS: LFINTOSC Frequency Stable bit
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
Note 1: The SOSCGO bit is only reset on a VDD Reset.
2010 Microchip Technology Inc.
Preliminary
DS41412A-page 33

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