PIC18F26K22T-I/ML View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F26K22T-I/ML

28/40/44-Pin, Low-Power,High-Performance Microcontrollers with XLP Technology

Microchip Technology 

PIC18(L)F2X/4XK22

22.7 Operation During Sleep

When the device wakes up from Sleep through an

interrupt or a Watchdog Timer time-out, the contents of

the VREFCON1 register are not affected. To minimize

current consumption in Sleep mode, the voltage

reference should be disabled.

22.8 Effects of a Reset

A device Reset affects the following:

• DAC is disabled

• DAC output voltage is removed from the

DACOUT pin

• The DAC1R<4:0> range select bits are cleared

REGISTER 22-1: VREFCON1: VOLTAGE REFERENCE CONTROL REGISTER 0

R/W-0

R/W-0

R/W-0

U-0

R/W-0

R/W-0

U-0

DACEN

DACLPS

DACOE

—

DACPSS<1:0>

—

bit 7

R/W-0

DACNSS

bit 0

Legend:

R = Readable bit

u = Bit is unchanged

‘1’ = Bit is set

W = Writable bit

x = Bit is unknown

‘0’ = Bit is cleared

U = Unimplemented bit, read as ‘0’

-n/n = Value at POR and BOR/Value at all other Resets

bit 7

bit 6

bit 5

bit 4

bit 3-2

bit 1

bit 0

DACEN: DAC Enable bit

1 = DAC is enabled

0 = DAC is disabled

DACLPS: DAC Low-Power Voltage Source Select bit

1 = DAC Positive reference source selected

0 = DAC Negative reference source selected

DACOE: DAC Voltage Output Enable bit

1 = DAC voltage level is also an output on the DACOUT pin

0 = DAC voltage level is disconnected from the DACOUT pin

Unimplemented: Read as ‘0’

DACPSS<1:0>: DAC Positive Source Select bits

00 = VDD

01 = VREF+

10 = FVR BUF1 output

11 = Reserved, do not use

Unimplemented: Read as ‘0’

DACNSS: DAC Negative Source Select bits

1 = VREF-

0 = VSS

 2010 Microchip Technology Inc.

Preliminary

DS41412A-page 343

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