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PIC18F26K22T-I/ML View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC18F26K22T-I/ML Datasheet PDF : 494 Pages
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PIC18(L)F2X/4XK22
DAW
Syntax:
Operands:
Operation:
Decimal Adjust W Register
DAW
None
If [W<3:0> > 9] or [DC = 1] then
(W<3:0>) + 6 W<3:0>;
else
(W<3:0>) W<3:0>;
If [W<7:4> + DC > 9] or [C = 1] then
(W<7:4>) + 6 + DC W<7:4>;
else
(W<7:4>) + DC W<7:4>
Status Affected:
C
Encoding:
0000 0000 0000 0111
Description:
DAW adjusts the eight-bit value in W,
resulting from the earlier addition of two
variables (each in packed BCD format)
and produces a correct packed BCD
result.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Example1:
Q2
Read
register W
Q3
Process
Data
Q4
Write
W
DAW
Before Instruction
W
= A5h
C
=0
DC
=0
After Instruction
W
C
DC
Example 2:
= 05h
=1
=0
Before Instruction
W
= CEh
C
=0
DC
=0
After Instruction
W
= 34h
C
=1
DC
=0
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Decrement f
DECF f {,d {,a}}
0 f 255
d [0,1]
a [0,1]
(f) – 1 dest
C, DC, N, OV, Z
0000 01da ffff ffff
Decrement register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 25.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
DECF
Before Instruction
CNT
Z
= 01h
=0
After Instruction
CNT
Z
= 00h
=1
CNT,
1, 0
DS41412A-page 388
Preliminary
2010 Microchip Technology Inc.

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