PIC18F8527-I View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F8527-I

64/80-Pin, 1-Mbit, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F8722 FAMILY

TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET Instruction,

Stack Resets

Wake-up via WDT

or Interrupt

IPR3

PIR3

6X27 6X22 8X27 8X22

6X27 6X22 8X27 8X22

1111 1111

0000 0000

1111 1111

0000 0000

uuuu uuuu

uuuu uuuu(1)

PIE3

6X27 6X22 8X27 8X22

0000 0000

0000 0000

uuuu uuuu

IPR2

PIR2

6X27 6X22 8X27 8X22

6X27 6X22 8X27 8X22

11-1 1111

00-0 0000

11-1 1111

00-0 0000

uu-u uuuu

uu-u uuuu(1)

PIE2

6X27 6X22 8X27 8X22

00-0 0000

00-0 0000

uu-u uuuu

IPR1

PIR1

6X27 6X22 8X27 8X22

6X27 6X22 8X27 8X22

1111 1111

0000 0000

1111 1111

0000 0000

uuuu uuuu

uuuu uuuu(1)

PIE1

6X27 6X22 8X27 8X22

0000 0000

0000 0000

uuuu uuuu

MEMCON

6X27 6X22 8X27 8X22

0-00 --00

0-00 --00

u-uu --uu

OSCTUNE

6X27 6X22 8X27 8X22

00-0 0000

00-0 0000

uu-u uuuu

TRISJ

6X27 6X22 8X27 8X22

1111 1111

1111 1111

uuuu uuuu

TRISH

6X27 6X22 8X27 8X22

1111 1111

1111 1111

uuuu uuuu

TRISG

6X27 6X22 8X27 8X22

---1 1111

---1 1111

---u uuuu

TRISF

6X27 6X22 8X27 8X22

1111 1111

1111 1111

uuuu uuuu

TRISE

6X27 6X22 8X27 8X22

1111 1111

1111 1111

uuuu uuuu

TRISD

6X27 6X22 8X27 8X22

1111 1111

1111 1111

uuuu uuuu

TRISC

6X27 6X22 8X27 8X22

1111 1111

1111 1111

uuuu uuuu

TRISB

TRISA(5)

6X27 6X22 8X27 8X22

6X27 6X22 8X27 8X22

1111 1111

1111 1111(5)

1111 1111

1111 1111(5)

uuuu uuuu

uuuu uuuu(5)

LATJ

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATH

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATG

6X27 6X22 8X27 8X22

--xx xxxx

--uu uuuu

--uu uuuu

LATF

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATE

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATD

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATC

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

LATB

LATA(5)

6X27 6X22 8X27 8X22

6X27 6X22 8X27 8X22

xxxx xxxx

xxxx xxxx(5)

uuuu uuuu

uuuu uuuu(5)

uuuu uuuu

uuuu uuuu(5)

PORTJ

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTH

6X27 6X22 8X27 8X22

0000 xxxx

uuuu uuuu

uuuu uuuu

PORTG

6X27 6X22 8X27 8X22

--xx xxxx

--uu uuuu

--uu uuuu

PORTF

6X27 6X22 8X27 8X22

x000 0000

u000 0000

uuuu uuuu

PORTE

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTD

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTC

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTB

6X27 6X22 8X27 8X22

xxxx xxxx

uuuu uuuu

uuuu uuuu

Legend:

Note 1:

2:

3:

4:

5:

u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector

(0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with

the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.

See Table 4-3 for Reset value for specific condition.

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled

as PORTA pins, they are disabled and read ‘0’.

DS39646B-page 60

Preliminary

 2004 Microchip Technology Inc.

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