PIC18F6585/8585/6680/8680
If an indirect addressing operation is done where the
target address is an FSRnH or FSRnL register, the
write operation will dominate over the pre- or
post-increment/decrement functions.
FIGURE 4-9:
INDIRECT ADDRESSING OPERATION
RAM 0h
Instruction
Executed
Opcode
Address
0FFFh
12
File Address = Access of an Indirect Addressing Register
BSR<3:0> 12
Instruction
Fetched
48
Opcode
File
12
FSR
FIGURE 4-10:
INDIRECT ADDRESSING
Indirect Addressing
11
FSR Register
Location Select
0
0000h
Data
Memory(1)
Note 1: For register file map detail, see Table 4-2.
0FFFh
DS30491D-page 80
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