PIC18F4510T-ESP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F4510T-ESP

28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

10.3 Prescaler

An 8-bit counter is available as a prescaler for the Timer0

module. The prescaler is not directly readable or writable;

its value is set by the PSA and T0PS2:T0PS0 bits

(T0CON<3:0>), which determine the prescaler

assignment and prescale ratio.

Clearing the PSA bit assigns the prescaler to the

Timer0 module. When it is assigned, prescale values

from 1:2 through 1:256 in power-of-2 increments are

selectable.

When assigned to the Timer0 module, all instructions

writing to the TMR0 register (e.g., CLRF TMR0, MOVWF

TMR0, BSF TMR0, etc.) clear the prescaler count.

Note:

Writing to TMR0 when the prescaler is

assigned to Timer0 will clear the prescaler

count but will not change the prescaler

assignment.

PIC18F2X1X/4X1X

10.3.1 SWITCHING PRESCALER

ASSIGNMENT

The prescaler assignment is fully under software

control and can be changed “on-the-fly” during program

execution.

10.4 Timer0 Interrupt

The TMR0 interrupt is generated when the TMR0

register overflows from FFh to 00h in 8-Bit mode, or from

FFFFh to 0000h in 16-Bit mode. This overflow sets the

TMR0IF flag bit. The interrupt can be masked by clear-

ing the TMR0IE bit (INTCON<5>). Before re-enabling

the interrupt, the TMR0IF bit must be cleared in software

by the Interrupt Service Routine.

Since Timer0 is shut down in Sleep mode, the TMR0

interrupt cannot awaken the processor from Sleep.

TABLE 10-1: REGISTERS ASSOCIATED WITH TIMER0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

Values

on page

TMR0L Timer0 Register, Low Byte

50

TMR0H Timer0 Register, High Byte

50

INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF

49

T0CON

TMR0ON T08BIT T0CS T0SE

PSA T0PS2 T0PS1 T0PS0

50

TRISA

RA7(1)

RA6(1)

RA5

RA4

RA3

RA2

RA1

RA0

52

Legend: Shaded cells are not used by Timer0.

Note 1: PORTA<7:6> and their direction bits are individually configured as port pins based on various primary

oscillator modes. When disabled, these bits read as ‘0’.

© 2007 Microchip Technology Inc.

Preliminary

DS39636C-page 115

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