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PIC18F4515T-I/SO View Datasheet(PDF) - Microchip Technology

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PIC18F4515T-I/SO Datasheet PDF : 378 Pages
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PIC18F2X1X/4X1X
REGISTER 22-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
bit 7
U-0
R/W-0
SWDTEN(1)
bit 0
bit 7-1
bit 0
Unimplemented: Read as ‘0
SWDTEN: Software Controlled Watchdog Timer Enable bit(1)
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Note 1: This bit has no effect if the Configuration bit, WDTEN, is enabled.
Legend:
R = Readable bit
U = Unimplemented bit, read as ‘0’
W = Writable bit
-n = Value at POR
TABLE 22-2: SUMMARY OF WATCHDOG TIMER REGISTERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2 Bit 1
Bit 0
Reset
Values
on page
RCON
IPEN SBOREN(1)
RI
TO
PD
POR
BOR
48
WDTCON
SWDTEN(2)
50
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
Note 1: The SBOREN bit is only available when the BOREN1:BOREN0 Configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
2: This bit has no effect if the Configuration bit, WDTEN, is enabled.
© 2007 Microchip Technology Inc.
Preliminary
DS39636C-page 247

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