PIC18F66K22-I/PTRSL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F66K22-I/PTRSL

64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

Microchip Technology 

PIC18F87K22 FAMILY

TABLE 1-3: PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin Number Pin Buffer

QFN/TQFP Type Type

Description

PORTA is a bidirectional I/O port.

RA0/AN0/ULPWU

RA0

AN0

ULPWU

24

I/O TTL

Digital I/O.

I Analog Analog Input 0.

I Analog Ultra Low-Power Wake-up input.

RA1/AN1

RA1

AN1

23

I/O TTL

Digital I/O.

I Analog Analog Input 1.

RA2/AN2/VREF-

RA2

AN2

VREF-

22

I/O TTL

Digital I/O.

I Analog Analog Input 2.

I Analog A/D reference voltage (low) input.

RA3/AN3/VREF+

RA3

AN3

VREF+

21

I/O TTL

Digital I/O.

I Analog Analog Input 3.

I Analog A/D reference voltage (high) input.

RA4/T0CKI

RA4

T0CKI

28

I/O ST

Digital I/O.

I

ST

Timer0 external clock input.

RA5/AN4/T1CKI/T3G/

HLVDIN

RA5

AN4

T1CKI

T3G

HLVDIN

27

I/O TTL

I Analog

I

ST

I

ST

I Analog

Digital I/O.

Analog Input 4.

Timer1 clock input.

Timer3 external clock gate input.

High/Low-Voltage Detect input.

RA6

See the OSC2/CLKO/RA6 pin.

RA7

Legend:

Note 1:

2:

3:

4:

See the OSC1/CLKI/RA7 pin.

TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

I = Input

P = Power

I2C = I2C™/SMBus

CMOS

Analog

O

OD

= CMOS compatible input or output

= Analog input

= Output

= Open-Drain (no P diode to VDD)

Default assignment for ECCP2 when the CCP2MX Configuration bit is set.

Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.

Not available on PIC18F65K22 and PIC18F85K22 devices.

The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit

(CONFIG3H<1>).

DS39960D-page 16

 2009-2011 Microchip Technology Inc.

Share Link: