PIC18F96J65T-I/PF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F96J65T-I/PF

64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

Microchip Technology 

PIC18F97J60 FAMILY

FIGURE 28-19: EUSARTx SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING

TXx/CKx

pin

RXx/DTx

pin

121

121

120

122

Note: Refer to Figure 28-3 for load conditions.

TABLE 28-24: EUSARTx SYNCHRONOUS TRANSMISSION REQUIREMENTS

Param

No.

Symbol

Characteristic

Min

Max

120 TCKH2DTV SYNC XMIT (MASTER and SLAVE)

Clock High to Data Out Valid

—

40

121 TCKRF

Clock Out Rise Time and Fall Time (Master mode)

—

20

122 TDTRF Data Out Rise Time and Fall Time

—

20

Units Conditions

ns

ns

ns

FIGURE 28-20: EUSARTx SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING

TXx/CKx

pin

RXx/DTx

pin

125

126

Note: Refer to Figure 28-3 for load conditions.

TABLE 28-25: EUSARTx SYNCHRONOUS RECEIVE REQUIREMENTS

Param.

No.

Symbol

Characteristic

Min Max

125 TDTV2CKL SYNC RCV (MASTER and SLAVE)

Data Hold before CKx  (DTx hold time)

10

—

126 TCKL2DTL Data Hold after CKx  (DTx hold time)

15

—

Units

ns

ns

Conditions

 2011 Microchip Technology Inc.

DS39762F-page 461

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