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PIC18F96J65T-I/PF View Datasheet(PDF) - Microchip Technology

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PIC18F96J65T-I/PF Datasheet PDF : 492 Pages
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PIC18F97J60 FAMILY
6.0 MEMORY ORGANIZATION
There are two types of memory in PIC18 Flash
microcontroller devices:
• Program Memory
• Data RAM
As Harvard architecture devices, the data and program
memories use separate busses. This allows for
concurrent access of the two memory spaces.
Additional detailed information on the operation of the
Flash program memory is provided in Section 7.0
“Flash Program Memory”.
6.1 Program Memory Organization
PIC18 microcontrollers implement a 21-bit program
counter which is capable of addressing a 2-Mbyte
program memory space. Accessing a location between
the upper boundary of the physically implemented
memory and the 2-Mbyte address will return all ‘0’s (a
NOP instruction).
The entire PIC18F97J60 family offers three sizes of
on-chip Flash program memory, from 64 Kbytes (up
to 32,764 single-word instructions) to 128 Kbytes
(65,532 single-word instructions). The program mem-
ory maps for individual family members are shown in
Figure 6-1.
FIGURE 6-1:
MEMORY MAPS FOR PIC18F97J60 FAMILY DEVICES
CALL, CALLW, RCALL,
PC<20:0>
21
RETURN, RETFIE, RETLW,
ADDULNK, SUBULNK
Stack Level 1

Stack Level 31
PIC18FX6J60
On-Chip
Memory
PIC18FX6J65
On-Chip
Memory
PIC18FX7J60
On-Chip
Memory
000000h
Config. Words
Unimplemented
Read as ‘0
Config. Words
Unimplemented
Read as ‘0
00FFFFh
017FFFh
Config. Words 01FFFFh
Unimplemented
Read as ‘0
Note:
1FFFFFh
Sizes of memory areas are not to scale. Sizes of program memory areas are enhanced to show detail.
2011 Microchip Technology Inc.
DS39762F-page 77

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