PIC18FXX8
ADDWFC
ADD W and Carry bit to f
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
[ label ] ADDWFC f [,d [,a]]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) + (f) + (C) → dest
N, OV, C, DC, Z
0010 00da ffff ffff
Add W, the Carry flag and data memory
location ‘f’. If ‘d’ is ‘0’, the result is placed
in W. If ‘d’ is ‘1’, the result is placed in
data memory location ‘f’. If ‘a’ is ‘0’, the
Access Bank will be selected. If ‘a’ is ‘1’,
the BSR will not be overridden.
1
Cycles:
Q Cycle Activity:
Q1
Decode
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
ADDWFC
Before Instruction
Carry bit =
REG =
W
=
After Instruction
Carry bit =
REG =
W
=
1
0x02
0x4D
0
0x02
0x50
REG, W
ANDLW
AND Literal with W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
[ label ] ANDLW k
0 ≤ k ≤ 255
(W) .AND. k → W
N, Z
0000 1011 kkkk kkkk
The contents of W are ANDed with the
8-bit literal ‘k’. The result is placed in W.
1
1
Q Cycle Activity:
Q1
Decode
Q2
Read literal
‘k’
Q3
Process
Data
Q4
Write to W
Example:
ANDLW
Before Instruction
W
=
After Instruction
W
=
0xA3
0x03
0x5F
DS41159E-page 288
© 2006 Microchip Technology Inc.