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PIC18F258-I/SP View Datasheet(PDF) - Microchip Technology

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Description
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PIC18F258-I/SP Datasheet PDF : 402 Pages
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PIC18FXX8
REGISTER 8-12:
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
IRXIP WAKIP ERRIP TXB2IP TXB1IP TXB0IP
bit 7
R/W-1
RXB1IP
R/W-1
RXB0IP
bit 0
bit 7
IRXIP: Invalid Message Received Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
WAKIP: Bus Activity Wake-up Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5
ERRIP: CAN bus Error Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4
TXB2IP: Transmit Buffer 2 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
TXB1IP: Transmit Buffer 1 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2
TXB0IP: Transmit Buffer 0 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
RXB1IP: Receive Buffer 1 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
RXB0IP: Receive Buffer 0 Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS41159E-page 90
© 2006 Microchip Technology Inc.

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