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PIC18LF448-E/PT View Datasheet(PDF) - Microchip Technology

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PIC18LF448-E/PT Datasheet PDF : 402 Pages
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PIC18FXX8
8.5 RCON Register
The Reset Control (RCON) register contains the IPEN
bit which is used to enable prioritized interrupts. The
functions of the other bits in this register are discussed
in more detail in Section 4.14 “RCON Register”.
REGISTER 8-13: RCON: RESET CONTROL REGISTER
R/W-0
U-0
U-0
R/W-1
R-1
IPEN
RI
TO
bit 7
R-1
R/W-0 R/W-0
PD
POR
BOR
bit 0
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as ‘0
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-3.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-3.
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-3.
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-3.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-3.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
© 2006 Microchip Technology Inc.
DS41159E-page 91

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