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PIC32MX230F064C-40I View Datasheet(PDF) - Microchip Technology

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Description
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PIC32MX230F064C-40I Datasheet PDF : 330 Pages
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TABLE 4-6: I2C1 AND I2C2 REGISTER MAP
Bits
31/15
30/14
29/13
28/12
27/11
26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
31:16 —
5000 I2C1CON
15:0 ON
0000
SIDL SCLREL STRICT A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN
PEN
RSEN
SEN 1000
31:16 —
0000
5010 I2C1STAT
15:0 ACKSTAT TRSTAT
BCL GCSTAT ADD10 IWCOL I2COV
D_A
P
S
R_W
RBF
TBF 0000
31:16 —
0000
5020 I2C1ADD
15:0 —
Address Register
0000
31:16 —
0000
5030 I2C1MSK
15:0 —
Address Mask Register
0000
31:16 —
0000
5040 I2C1BRG
15:0 —
Baud Rate Generator Register
0000
31:16 —
0000
5050 I2C1TRN
15:0 —
Transmit Register
0000
31:16 —
0000
5060 I2C1RCV
15:0 —
Receive Register
0000
31:16 —
5100 I2C2CON
15:0 ON
0000
SIDL SCLREL STRICT A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN
PEN
RSEN
SEN 1000
31:16 —
0000
5110 I2C2STAT
15:0 ACKSTAT TRSTAT
BCL GCSTAT ADD10 IWCOL I2COV
D_A
P
S
R_W
RBF
TBF 0000
31:16 —
0000
5120 I2C2ADD
15:0 —
Address Register
0000
31:16 —
0000
5130 I2C2MSK
15:0 —
Address Mask Register
0000
31:16 —
0000
5140 I2C2BRG
15:0 —
Baud Rate Generator Register
0000
31:16 —
0000
5150 I2C2TRN
15:0 —
Transmit Register
0000
31:16 —
0000
5160 I2C2RCV
15:0 —
Receive Register
0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table except I2CxRCV have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV
Registers” for more information.

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