DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ZPSD211RVL View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ZPSD211RVL Datasheet PDF : 51 Pages
First Prev 31 32 33 34 35 36 37 38 39 40 Next Last
PSD211R Family
18.7 Timing Parameters – PSD211R/ZPSD211R (All 5 V devices)
Symbol
Parameter
-70
-90
-15 CMiser
On = Unit
Min Max Min Max Min Max Add
T1
ALE or AS Pulse Width
18
20
40
0
ns
T2
Address Set-up Time
5
5
12
0
ns
T3
Address Hold Time
7
8
10
0
ns
T4
Leading Edge of Read to Data Active
0
0
0
0
ns
T5
ALE Valid to Data Valid
80
100
160 10 ns
T6
Address Valid to Data Valid
70
90
150 10 ns
T7
CSI Active to Data Valid
80
100
160 10 ns
T8
Leading Edge of Read to Data Valid
20
32
55
0
ns
Leading Edge of Read to Data Valid in
T8A 8031-Based Architecture Operating with PSEN
and RD in Separate Mode
32
32
55
0
ns
T9
Read Data Hold Time
0
0
0
0
ns
T10 Trailing Edge of Read to Data High-Z
20
35
35
0
ns
T11
Trailing Edge of ALE or AS to Leading Edge
of Write
0
0
0
0
ns
T12 RD, E, PSEN Pulse Width
35
45
60
0
ns
T12A WR Pulse Width
18
25
35
0
ns
T13
Trailing Edge of Write or Read to Leading Edge
of ALE or AS
5
5
5
0
ns
T14 Address Valid to Trailing Edge of Write
70
120
150
0
ns
T15 CSI Active to Trailing Edge of Write
80
130
160
0
ns
T16 Write Data Set-up Time
18
25
30
0
ns
T17 Write Data Hold Time
5
5
10
0
ns
T18 Port to Data Out Valid Propagation Delay
25
28
35
0
ns
T19 Port Input Hold Time
0
0
0
0
ns
T20 Trailing Edge of Write to Port Output Valid
30
35
50
0
ns
T21 ADi1 or Control to CSOi2 Valid
6 20 6 25 6 35 10 ns
T22 ADi1 or Control to CSOi2 Invalid
5 20 5 25 4 35 10 ns
T23 Latched Address Outputs, Port A
22
22
28
0
ns
T30 CSI Active to CSOi2 Active
8 37 9 40 9 50
0
ns
T31 CSI Inactive to CSOi2 Inactive
8 37 9 40 9 50
0
ns
T32 Direct PAD Input3 as Hold Time
0
0
12
0
ns
T33 R/W Active to E High
18
20
30
0
ns
T34 E End to R/W
18
20
30
0
ns
T35 AS Inactive to E high
0
0
0
0
ns
T36 Address to Leading Edge of Write
18
20
25
0
ns
NOTES: 1.
2.
3.
4.
ADi = any address line.
CSOi = any of the chip-select output signals coming through Port B (CS0–CS7) or through Port C (CS8–CS10).
Direct PAD input = any of the following direct PAD input lines: CSI/A19 as transparent A19, RD/E, WR or R/W,
transparent PC0–PC2, ALE (or AS).
Control signals RD/E or WR or R/W.
33

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]