PSD825G2V-90 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD825G2V-90 Datasheet PDF : 93 Pages
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Preliminary Information
Microcontroller Interface – PSD4000 AC/DC Parameters
(5V ± 10% Versions)
Power Down Timing (5 V ± 10%)
Symbol
Parameter
t LVDV
ALE Access Time from
Power Down
t CLWH
Maximum Delay from APD Enable
to Internal PDN Valid Signal
NOTE: 1. tCLCL is the CLKIN clock period.
Conditions
Using CLKIN Input
Vstbyon Timing (5 V ± 10%)
Symbol
Parameter
t BVBH
t BXBL
Vstby Detection to Vstbyon Output High
Vstby Off Detection to Vstbyon
Output Low
NOTE: 1. Vstbyon is measured at VCC ramp rate of 2 ms.
Conditions
(Note 1)
(Note 1)
Reset Pin Timing (5 V ± 10%)
Symbol
Parameter
t NLNH
t OPR
t NLNH-PO
t NLNH-A
Warm RESET Active Low Time (Note 1)
RESET High to Operational Device
Power On Reset Active Low Time
Warm RESET Active Low Time
(Note 2)
NOTE: 1. RESET will not abort Flash programming/erase cycles.
2. RESET will abort Flash programming or erase cycle.
Conditions
PSD4000 Series
-70
-90
Min Max Min Max Unit
80
90 ns
15 * tCLCL (µs) (Note 1)
µs
Min
Typ
Max Unit
20
µs
20
µs
Min
Typ
Max Unit
150
ns
120
ns
1
ms
25
µs
71
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