ST92P141K4D0 View Datasheet(PDF) - STMicroelectronics
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Description
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ST92P141K4D0 Datasheet PDF : 179 Pages
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ST92141 - RESET AND CLOCK CONTROL UNIT (RCCU)
5.7 STOP MODE
Under control of the Wake-up Interrupt Manage-
ment Unit (WUIMU), the Reset/Stop Manager can
also stop all oscillators without resetting the de-
vice.
In Stop Mode all context information will be pre-
served. During this condition the internal clock will
be frozen in the high state.
Stop Mode is entered by programming the WUIMU
registers (See “WAKE-UP / INTERRUPT LINES
MANAGEMENT UNIT (WUIMU)” on page 55.). An
Table 18. Internal Registers Reset Values
active transition on an External Wake Up line, exits
the chip from Stop Mode and the MCU resumes
execution after a delay of between 10239
CLOCK2 periods and 10239 CLOCK2 periods
plus the Oscillator Start Up Time.
On exiting from Stop mode an interrupt is generat-
ed and the EX_STP bit in CLK_FLAG will be set,
to indicate to the user program that the machine is
exiting from Stop mode.
Register
Number
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0
System Register
(SSPLR)
(SSPHR)
(USPLR)
(USPHR)
(MODER)
(Page Ptr)
(Reg Ptr 1)
(Reg Ptr 0)
(FLAGR)
(CICR)
(PORT5)
(PORT4)
(PORT3)
(PORT2)
(PORT1)
(PORT0)
Reset Value
undefined
undefined
undefined
undefined
E0h
undefined
undefined
undefined
undefined
87h
FFh
FFh
FFh
FFh
FFh
FFh
Page 0 Register
Reserved
(SPICR)
(SPIDR)
(WCR)
(WDTCR)
(WDTPR)
(WDTLR)
(WDTHR)
(NICR)
(EIVR)
(EIPLR)
(EIMR)
(EIPR)
(EITR)
Reserved
Reserved
Reset Value
00h
undefined
7Fh
12h
undefined
undefined
undefined
00h
x2h
FFh
00h
00h
00h
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