ST92F120R1Q7 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92F120R1Q7

8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD

STMicroelectronics 

ST92F120 - GENERAL DESCRIPTION

Table 1. ST92F120 Power Supply Pins

Name

Function

18

Main Power Supply Voltage

42

VDD

( pins internally connected)

65

93

17

Digital Circuit Ground

41

VSS

(pins internally connected)

64

92

AVDD

Analog Circuit Supply Voltage

82

AVSS

Analog Circuit Ground

83

VTEST

Must be kept low in standard operating

mode

44

VREG

3V Regulator output

(on future versions,

i.e. ST92F124 and ST92F150)

31

43

Table 2. ST92F120 Primary Function Pins

Name

Function

AS

Address Strobe

56

DS

Data Strobe

55

RW

Read/Write

32

OSCIN

Oscillator Input

94

OSCOUT

Oscillator Output

95

RESET Reset to initialize the Microcontroller 96

HW0SW1

Watchdog HW/SW enabling selec-

tion

97

J1850 JBLPD Output. On devices

VPWO without JBPLD peripheral, this pin 73

must not be connected.

Figure 8. Recommended Connections for VREG

PQFP100

300 nF

300 nF

Note : For future compatibility with shrinked versions, the VREG pins should be connected to a minimum

of 600 nF (total). Special care should be taken to minimize the distance between the ST9 microcontroller

and the capacitors.

13/324

9

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