ST92T163N4D0 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92T163N4D0

8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT

STMicroelectronics 

ST92163 - USB PERIPHERAL (USB)

USB INTERFACE (Cont’d)

Interrupt sources are classified according to the

following table

CONTROL REGISTER (USBCTLR)

R252 - Read/Write

Register page: 15

Reset Value: 0001 0101 (15h)

7

0

TI M_

LP_

0

0 SDNAV RESUME PDWN

FR ES

SUSP

SU SP

Bit 7 = Reserved. This bit is fixed by hardware at 0.

Bit 6 = TIM_SUSP: Timed Suspend.

Set by software when the SUSP interrupt is re-

ceived to enter “timed-suspend” state.

0: Timed suspend inactive

1: Timed suspend active. The USB interface oper-

ates as in suspend mode but clocks and static

power dissipation in the analog transceiver are

not stopped.

Bit 5 = Reserved.

Bit 3 = RESUME: Resume request.

Set by software to send a Resume signal to the

host.

0: Resume signal not forced on USB data lines.

1: Resume signal forced on USB data lines.

Bit 2 = PDWN: Power Down.

Set by software to turn off the 3.3V on-chip voltage

regulator that supplies the external pull-up resistor

and the transceiver.

Note: As a consequence the voltage on both USB

root port signal lines will drift to 0V because of the

pull-down resistors in the upstream USB host or

hub, generating a disconnect indication. At least 2

µs are required until the 3.3V supply falls within

specifications after this bit is cleared, depending

on the value of the external bypass capacitor.

Bit 1 = LP_SUSP: Low-power suspend.

Set by software to put the USB interface in “low-

power suspend” state. This condition should be

entered while in “timed suspend” state

(TIM_SUSP=1).

0: Low-power suspend inactive

1: Low-power suspend active

Bit 4 = SDNAV: Single/Multiple Vector Selection.

This bit is set by software to select the single or

multiple interrupt vector mode .

0: Multiple interrupt vector mode

1: Single interrupt vector mode

See USBIVR register description for detailed infor-

mation.

Bit 0 = FRES: Force USB Reset.

Set by software to force a reset of the USB inter-

face, just like a RESET signal on the USB. The

USB interface is held in RESET state until soft-

ware clears this bit, and a “USB-RESET” interrupt

is generated, if enabled.

0: Reset not forced

1: USB interface reset forced

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