PSD921F3-A-20MI View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD921F3-A-20MI Datasheet PDF : 94 Pages
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Preliminary Information
PSD9XX Family
Microcontroller Interface – PSD9XXFV AC/DC Parameters
(3 V Versions)
Read Timing (3 V Versions)
Symbol
Parameter
Conditions
-12
-15
-20
Turbo
Min Max Min Max Min Max Off
Unit
t LVLX
t AVLX
t LXAX
t AVQV
t SLQV
t RLQV
ALE or AS Pulse Width
Address Setup Time
Address Hold Time
Address Valid to Data Valid
CS Valid to Data Valid
RD to Data Valid 8-Bit Bus
RD or PSEN to Data Valid
8-Bit Bus, 8031, 80251
(Note 3)
(Note 3)
(Note 3)
(Note 5)
(Note 2)
26
26
30
ns
9
10
12
ns
9
12
14
ns
120
150
200 Add 20 ns
120
150
200
ns
35
35
40
ns
45
50
55
ns
t RHQX RD Data Hold Time
(Note 1)
0
0
0
ns
t RLRH
RD Pulse Width
(Note 1)
38
40
45
ns
tRHQZ RD to Data High-Z
(Note 1)
38
40
45
ns
t EHEL
E Pulse Width
40
45
52
ns
tTHEH R/W Setup Time to Enable
15
18
20
ns
t ELTL
R/W Hold Time After Enable
0
0
0
ns
t AVPV
Address Input Valid to
(Note 4)
33
35
40
ns
Address Output Delay
NOTES: 1. RD timing has the same timing as DS, LDS, UDS, and PSEN signals.
2. RD and PSEN have the same timing for 8031.
3. Any input used to select an internal PSD813F function.
4. In multiplexed mode latched address generated from ADIO delay to address output on any Port.
5. RD timing has the same timing as DS, LDS, and UDS signals.
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