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PSD934210MT View Datasheet(PDF) - STMicroelectronics

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PSD934210MT Datasheet PDF : 89 Pages
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PSD834F2V
Configuration Modes for MCUs with Separate
Program and Data Spaces. Separate Space
Modes. Program space is separated from Data
space. For example, Program Select Enable
(PSEN, CNTL2) is used to access the program
code from the primary Flash memory, while Read
Strobe (RD, CNTL1) is used to access data from
the secondary Flash memory, SRAM and I/O Port
blocks. This configuration requires the VM register
to be set to 0Ch (see Figure 7).
Figure 7. 8031 Memory Modules – Separate Space
DPLD
RS0
CSBOOT0-3
FS0-FS7
Primary
Flash
Memory
CS
OE
Secondary
Flash
Memory
CS
OE
SRAM
CS
OE
PSEN
RD
Combined Space Modes. The Program and
Data spaces are combined into one memory
space that allows the primary Flash memory, sec-
ondary Flash memory, and SRAM to be accessed
by either Program Select Enable (PSEN, CNTL2)
AI02869C
or Read Strobe (RD, CNTL1). For example, to
configure the primary Flash memory in Combined
space, bits b2 and b4 of the VM register are set to
1 (see Figure 8).
Figure 8. 8031 Memory Modules – Combined Space
RD
VM REG BIT 3
VM REG BIT 4
PSEN
VM REG BIT 1
VM REG BIT 2
VM REG BIT 0
DPLD
RS0
CSBOOT0-3
FS0-FS7
Primary
Flash
Memory
CS
OE
Secondary
Flash
Memory
CS
OE
SRAM
CS
OE
RD
AI02870C
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