PSD934210MT View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD934210MT
STMicroelectronics
PSD934210MT Datasheet PDF : 89 Pages
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PSD834F2V
Table 50. Port A Peripheral Data Mode Read Timing
Symbol
Parameter
Conditions
tAVQV–PA
tSLQV–PA
tRLQV–PA
tDVQV–PA
tQXRH–PA
tRLRH–PA
tRHQZ–PA
Address Valid to Data Valid
CSI Valid to Data Valid
RD to Data Valid
RD to Data Valid 8031 Mode
Data In to Data Out Valid
RD Data Hold Time
RD Pulse Width
RD to Data High-Z
(Note 3)
(Notes 1,4)
(Note 1)
(Note 1)
-10
Min Max
-15
Min Max
-20
Turbo
Min Max Off
Unit
50
50
50 + 20 ns
37
45
50 + 20 ns
37
40
45
ns
45
45
50
ns
38
40
45
ns
0
0
0
ns
36
36
46
ns
36
40
45
ns
Table 51. Port A Peripheral Data Mode Write Timing
Symbol
Parameter
Conditions
-10
-15
-20
Unit
Min Max Min Max Min Max
tWLQV–PA
WR to Data Propagation Delay
(Note 2)
42
45
55 ns
tDVQV–PA
Data to Port A Data Propagation Delay
(Note 5)
38
40
45 ns
tWHQZ–PA WR Invalid to Port A Tri-state
(Note 2)
33
33
35 ns
Note: 1. RD has the same timing as DS, LDS, UDS, and PSEN (in 8031 combined mode).
2. WR has the same timing as the E, LDS, UDS, WRL, and WRH signals.
3. Any input used to select Port A Data Peripheral mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
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