PSD933312MIT View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD933312MIT Datasheet PDF : 110 Pages
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PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
Figure 44. Input Macrocell Timing (product term clock)
tINH
tINL
PT CLOCK
tIS
tIH
INPUT
OUTPUT
AI03101
tINO
Table 53. Input Macrocell Timing (5V devices)
Symbol
Parameter
Conditions
-70
Min Max
-90
-15
Min Max Min Max
PT
Aloc
Turbo
Off
Unit
tIS
Input Setup Time
(Note 1)
0
0
0
ns
tIH
Input Hold Time
(Note 1)
15
20
26
+ 10 ns
tINH
NIB Input High Time
(Note 1)
9
12
18
ns
tINL
NIB Input Low Time
(Note 1)
9
12
18
ns
tINO
NIB Input to Combinatorial
Delay
(Note 1)
34
46
59 + 2 + 10 ns
Note: 1. Inputs from Port A, B, and C relative to register/ latch clock from the PLD. ALE/AS latch timings refer to tAVLX and tLXAX.
Table 54. Input Macrocell Timing (3V devices)
Symbol
Parameter
Conditions
-12
Min Max
-15
-20
Min Max Min Max
PT
Aloc
Turbo
Off
Unit
tIS
Input Setup Time
(Note 1)
0
0
0
ns
tIH
Input Hold Time
(Note 1)
25
25
30
+ 20 ns
tINH
NIB Input High Time
(Note 1)
12
13
15
ns
tINL
NIB Input Low Time
(Note 1)
12
13
15
ns
tINO
NIB Input to Combinatorial
Delay
(Note 1)
46
62
70 + 4 + 20 ns
Note: 1. Inputs from Port A, B, and C relative to register/latch clock from the PLD. ALE latch timings refer to tAVLX and tLXAX.
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