S-812C27AMC-C2HT2G View Datasheet(PDF) - Seiko Instruments Inc

Part Name

Description

Manufacturer

S-812C27AMC-C2HT2G

HIGH OPERATING VOLTAGE CMOS VOLTAGE REGULATOR

Seiko Instruments Inc 

HIGH OPERATING VOLTAGE CMOS VOLTAGE REGULATOR

S-812C Series

Rev.4.0_00

„ Operation

1. Basic Operation

Figure 16 shows the block diagram of the S-812C Series.

The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-

divided by feedback resistors Rs and Rf. It supplies the gate voltage necessary to maintain the constant

output voltage which is not influenced by the input voltage and temperature change, to the output

transistor.

VIN

Current supply

Vref

Error amplifier

−

+

*1

VOUT

Rf

Reference

voltage

circuit

RS

VSS

*1. Parasitic diode

Figure 16

2. Output Transistor

In the S-812C Series, a low on-resistance P-channel MOS FET is used as the output transistor.

Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due

to inverse current which flows, because of a parasitic diode between the VIN and VOUT pin.

16

Seiko Instruments Inc.

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