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SC1403(2002) View Datasheet(PDF) - Semtech Corporation

Part Name
Description
Manufacturer
SC1403 Datasheet PDF : 30 Pages
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SC1403
POWER MANAGEMENT
AApppplliiccaattiioonnss IInnffoorrmmaattiioonn (Cont.)
200
Designing the Loop
150
PRELIMINARY
There are two aspects concerning the loop design. One is the
power train design and the other is the external compensation
design. A good loop design is a combination of the two. In the
SC1403, the control-to-output/power train response is dominated
by the load impedance, the effective current sense resistor, out-
put capacitance, and the ESR of the output caps. The low fre-
quency gain is dominated by the output load impedance and the
effective current sense resistor. Inherent to Virtual Current SenseTM,
there is one additional low frequency pole sitting between 100Hz
and 1KHz and a zero between 15KHz and 25KHz. To compensate
for the SC1403 is easy since the output of error amplifier COMP
pin is available for external compensation. A traditional pole-zero-
pole compensation is not necessary in the design using SC1403.
To ensure high phase margin at crossover frequency while mini-
mizing the component count, a simple high frequency pole is usu-
ally sufficient. In the reference design below, single-pole compen-
sation method is demonstrated. And the loop measurement re-
sults are compared to that obtained from the simulation model.
Transient response is also done to validate the model. Also, to
help speeding up the design process, a list of recommended out-
put caps vs. compensation caps value is given in table I.
Single-Pole compensation Method
Given parameters:
Vin = 19V, Vout = 3.3V @ 2.2A,
Output impedance, Ro = 3.3V/2.2A = 1.5 ,
Panasonic SP cap, Co = 180uF, Resr = 15 m,
Output inductor, Lo = 4.7uH
Switching frequency, Fs = 300KHz
100
50
0
-50
-100
-150
-200
1.00E+02
1.00E+03
f (Hz)
1.00E+04
1.00E+05
Measured Control-to-Output gain & phase response (up to
100KHz) is plotted below.
50
40
30
20
10
0
-10
-20
-30
-40
-50
1.00E+02
1.00E+03
f (Hz)
1.00E+04
1.00E+05
200
Simulated Control-to-Output gain & phase response (up to
150
100KHz) is plotted below
100
.
50
40
30
20
10
0
-10
-20
-30
-40
-50
1.00E+02
.
1.00E+03
f (Hz)
1.00E+04
1.00E+05
50
0
-50
-100
-150
-200
1.00E+02
1.00E+03
f (Hz)
1.00E+04
1.00E+05
Single-pole compensation of the error amplifier is achieved by
connecting a 100pF capacitor from the COMP pin of the SC1403
to ground. The simulated feedback gain & phase response (up to
100KHz) is plotted below.
2002 Semtech Corp.
13
www.semtech.com

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