Si3230
Register 20. Interrupt Status 3
Bit
D7
D6
Name
Type
Reset settings = 0000_0000
Si3230/Si3211
D5
D4
D3
D2
CMCP
R/W
D1
INDP
R/W
D0
DTMFP
R/W
Si3212
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
CMCP INDP
Type
R/W
R/W
Reset settings = 0000_0000
Bit
Name
Function
7:3 Reserved Read returns zero.
2
CMCP
Common Mode Calibration Error Interrupt.
This bit is set when off-hook/on-hook status changes during the common mode balance
calibration. Writing 1 to this bit clears a pending interrupt.
0 = No interrupt pending.
1 = Interrupt pending.
1
INDP
Indirect Register Access Serviced Interrupt.
This bit is set once a pending indirect register service request has been completed. Writ-
ing 1 to this bit clears a pending interrupt.
0 = No interrupt pending.
1 = Interrupt pending.
0
DTMFP DTMF Tone Detected Interrupt (Si3230 and Si3211 only).
Writing 1 to this bit clears a pending interrupt.
0 = No interrupt pending.
1 = Interrupt pending.
Si3212 = Reserved; read returns 0.
52
Preliminary Rev. 0.96