SI4010-C2-GS View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
SI4010-C2-GS Datasheet PDF : 156 Pages
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Si4010-C2
Digital logic
Wr: PORT_MATRIX
Wr: PORT_ROFF
PORT_STROBE
Rd: PORT_MATRIX
Rd: PORT_ROFF
port_push_pull[n]
port_oe[n]
port_dataout[n]
gpio_in[n]
gpio_push_pull[n]
gpio_dataout[n]
1
3
22
E
E
GPIO Pads
Vcc
~50k
GPIO[n]
Figure 30.2. GPIO[3:1] Functional Diagram
Functional diagram of the other GPIO ports is in Figure 30.3. It is the general GPIO circuit that can be
forced by digital control to have limited functionality (e.g., as input only, etc.).
Digital logic
GPIO Pads
port_push_pull[n]
port_oe[n]
port_dataout[n]
gpio_in[n]
gpio_push_pull[n]
gpio_dataout[n]
Vcc
~50k
GPIO[n]
Figure 30.3. Other GPIO Functional Diagram
110
Rev. 1.0
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