SI4010-C2-GS View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

SI4010-C2-GS

CRYSTAL-LESS SOC RF TRANSMITTER

Silicon Laboratories 

Si4010-C2

SFR Definition 34.7. TMR3CTRL

Bit

Name

Type

Reset

7

TMR3

INTH

R/W

0

6

TMR3

INTL

R/W

0

5

TMR3

INTL_EN

R/W

0

4

TMR3

SPLIT

R/W

0

3

TMR3H_

CAP

R/W

0

2

TMR3L_

CAP

R/W

0

1

TMR3H_

RUN

R/W

0

0

TMR3L_

RUN

R/W

0

SFR Address = 0xB9

;

Bit Name

Function

Timer 3 High Byte Interrupt Flag.

7

TMR3

INTH

Interrupt flag for timer high half in split configuration or overall 16 bit timer in wide

configuration. It gets set when the high half of the timer overflows or there is a cap-

ture event for the high half. This bit is not automatically cleared by hardware.

Timer 3 Low Byte Overflow Flag.

Interrupt flag for the timer low half. It gets set when the low half overflows in timer

mode or by capture event of the low half in capture mode. Software must clear this

bit, hardware will not clear it.

6

TMR3

INTL

This bit is set when the low half of the timer overflows even if we operate in wide con-

figuration.

When in wide configuration and in capture mode this bit is set when the high half of

the timer overflows. Since in that case the capture event is the same for both halves,

the capture event sets the TMR3INTH interrupt flag. Then this TMR3INTL can be

used as a flag that the timer overflew, serving as an additional 17th timer bit in cap-

ture mode in wide configuration.

Timer 3 Low Byte Interrupt Enable.

5

TMR3 When set to 1, this bit enables Timer 3 Low Byte interrupts. The overall timer inter-

INTL_EN rupt request signal is : TMR3 interrupt request = TMR3INTH | (TMR3INTL &

TMR3INTL_EN)

Timer 3 Split Mode Enable.

4

TMR3

SPLIT

0: Timer operates in wide configuration as 16 bit timer. The low half controls the

whole timer.

1: Timer operates in split configuration. Both halves are controlled independently.

3

TMR3H_

CAP

Timer 3 High Byte Capture Mode Enable.

If set then TMR3H high half operates in capture mode if the timer is in split configura-

tion mode. Ignored if the timer operates in wide configuration mode.

2

TMR3L_

CAP

Timer 3 Low Byte Capture Mode Enable.

If set then TMR3L low half operates in capture mode if the timer is in split configura-

tion, or the whole timer operates in capture mode if in wide configuration mode.

144

Rev. 1.0

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