PLEASE NOTE: The SMB118 has entered End-of-Life.
SMB118/218
I2C PROGRAMMING INFORMATION (Continued)
M aster
Slave
S
S
T
T
A
Configuration
A
R
Bus Address
Register Address
R
Bus Address
T
T
S
A
S
A
S
A
S
A
A
2
A
1
A
0
W
3210
CCCCCCCC
76543210
A
A
C
C
K
K
S
A
S
A
S
A
SA
A2
A
1
A
0
R
3210
A
C
K
M aster
Slave
M aster
Slave
A
Data (1)
C
K
DDDDDDDD
76543210
DDD
765
NS
A
AT
C
Data (n)
CO
K
KP
DDD
210
DDDDDDDD
76543210
Figure 17 - Configuration Register Read
S
T
A
Configuration
R
Bus Address
Register Address
T
S
T
Data
O
P
S
A
S
A
S
A
S
A
A
2
A
1
AW
0
3210
CCCCCCCC
76543210
DDDDDDDD
76543210
A
A
A
C
C
C
K
K
K
M aster
Slave
Figure 18– General Purpose Memory Byte Write
S
T
A
R
Bus Address
Configuration
Register Address
T
Data (1)
S S S SA A A
A A A A2 1 0W
3210
CCCCCCCC
76543210
DDDDDDDD
76543210
A
A
A
C
C
C
K
K
K
M aster
Slave
Data (2)
DDDDDDDD
76543210
DDD
765
A
C
K
S
T
Data (16)
O
P
DDD
210
DDDDDDDD
76543210
A
A
C
C
K
K
Figure 19 - General Purpose Memory Page Write
Summit Microelectronics, Inc
2107 3.0 10/15/2008
34