SMB139
CONFIGURATION REGISTERS (CONT.)
Table 9 – Battery charging control – 8-bit (address: 05h) – Non-Volatile & Volatile (mirror)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Status Output
0
X
X
X
X
X
X
X
STAT is active low while charging, active
high all other times
1
X
X
X
X
X
X
X
STAT blinks while charging, is active low
when finished, active high when disabled
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Charging Initiation
X
0
X
X
X
X
X
X
Requires I2C command – EN pin has no
effect
X
1
X
X
X
X
X
X
Controlled by EN pin – I2C command has no
effect
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Glitch Filter
X
X
0
X
X
X
X
X
Glitch filter enabled
X
X
1
X
X
X
X
X
Glitch filter disabled
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Fast-charge Timeout
X
X
X
X
0
0
X
X
350 min
X
X
X
X
0
1
X
X
699 min
X
X
X
X
1
0
X
X
1398 min
X
X
X
X
1
1
X
X
Disabled
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Pre-charge Timeout
X
X
X
X
X
X
0
0
44 min
X
X
X
X
X
X
0
1
87 min
X
X
X
X
X
X
1
0
175 min
X
X
X
X
X
X
1
1
Disabled
Table 10 – STAT Output – 8-bit (address: 07h) – Non-Volatile
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
X
X
X
X
X
0
X
X
X
X
X
X
1
X
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
X
X
X
X
X
X
0
X
X
X
X
X
X
1
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Bit0
STAT Output Indicator
X
Battery charge status
X
Input over-voltage or input under-voltage
Bit0
Battery over-voltage Behavior
X
Charger is shutdown
X
Charger is not shutdown
Bit0
CHGSET Control
0
CHGSET input pin
1
CHGSET register (address 31h)
Table 11 – Configuration and User Memory Lock – 8-bit (address: 0Eh) – Non-Volatile
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Configuration Lock
X
X
X
X
X
0
X
X
Unlocked – user can write to non-volatile
Configuration bits
X
X
X
X
X
1
X
X
Locked – user cannot write to non-volatile
Configuration bits
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
User-Memory Lock
X
X
X
X
X
X
0
X
Unlocked – user can write to general
purpose EE bits (h20-h2F)
X
X
X
X
X
X
1
X
Locked – user cannot write to general
purpose EE bits (h20-h2F)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Volatile Writes Permission
X
X
X
X
X
X
X
0
No volatile writes to registers h00-h07
X
X
X
X
X
X
X
1
Allow volatile writes to registers h00-h07
(even if h0E[2]=1)
Summit Microelectronics, Inc
2121 3.0 6/19/2008
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