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T89C51RD2-3CVC-M View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
T89C51RD2-3CVC-M
Atmel
Atmel Corporation 
T89C51RD2-3CVC-M Datasheet PDF : 86 Pages
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T89C51RD2
PROGRAM
SIGNALS*
CONTROL
SIGNALS*
4 to 6 MHz
EA
ALE/PROG
RST
PSEN
P2.6
P2.7
P3.3
P3.6
P3.7
XTAL1
+5V
VCC
P0.0-P0.7
D0-D7
P1.0-P1.7
A0-A7
P2.0-P2.5
P3.4
P3.5
VSS
GND
A8-A13
A14
A15
Figure 22. Set-Up Modes Configuration
8.9.4. Programming Algorithm
To program the T89C51RD2 the following sequence must be exercised:
Check the signature bytes
Check the HSB (VSB mode)
If the security bits are activated, the following commands must be done before programming:
Unlock test modes (PEULCK mode, pulse 55h and AAh)
Chip erase (CERR mode)
Write FFh in the HSB (PGMS mode)
Write the signature bytes content in the XAF
As the boot loader and the XAF content is lost after a "chip erase", it must be reprogrammed if needed.
Disable programming access (PELCK mode)
To write a page in the FLASH memory, execute the following steps:
Step 0: Enable programming access (PEULCK mode)
Step 1: Activate the combination of control signals (PGML mode)
Step 2: Input the valid address on the address lines (High order bits of the address must be stable during the
complete ALE low time)
Step 3: Activate the combination of control signals (PGML mode)
Step 4: Input the appropriate data on the data lines.
Step 5: Pulse ALE/PROG once.
Repeat step 2 through 5 changing the address and data for end of a 128 bytes page
Step 6: Enable programming access (PEULCK mode)
Step 7: Activate the combination of control signals (PGMC mode)
67
Rev. F - 15 February, 2001

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