SST34HF1641C-70-4E-L1SE View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

Manufacturer

SST34HF1641C-70-4E-L1SE

16 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemory

Silicon Storage Technology 

Data Sheet

16 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemory

SST34HF1621C / SST34HF1641C

ADDRESS A19-0

BEF#

OE#

WE#

DQ6

TCE

TOEH

TOE

TBR

VALID DATA

TWO READ CYCLES

WITH SAME OUTPUTS

1252 F11.0

FIGURE 13: Flash Toggle Bit Timing Diagram for Word Mode

(For Byte Mode A-1 = Don’t Care)

ADDRESS A19-0

SIX-BYTE CODE FOR CHIP-ERASE

555

2AA

555

555

2AA

555

BEF#

TSCE

OE#

WE#

RY/BY#

TWP

TBY

TBR

DQ15-0

XXAA XX55

XX80

XXAA

XX55

XX10

VALID

Note: This device also supports BEF# controlled Chip-Erase operation.

The WE# and BEF# signals are interchangeable as long as minimum timings are met. (See Table 16.)

X can be VIL or VIH, but no other value.

1252 F12.1

FIGURE 14: Flash WE# Controlled Chip-Erase Timing Diagram for Word Mode

(For Byte Mode A-1 = Don’t Care)

©2006 Silicon Storage Technology, Inc.

24

S71252-03-000

8/06

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