PIC16C62XAT-20I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16C62XAT-20I/SO

EPROM-Based 8-Bit CMOS Microcontroller

Microchip Technology 

PIC16C62X

4.2 Data Memory Organization

The data memory (Figure 4-4, Figure 4-5, Figure 4-6 and

Figure 4-7) is partitioned into two Banks which contain the

general purpose registers and the special function regis-

ters. Bank 0 is selected when the RP0 bit is cleared. Bank

1 is selected when the RP0 bit (STATUS <5>) is set. The

Special Function Registers are located in the first 32 loca-

tions of each Bank. Register locations 20-7Fh (Bank0) on

the PIC16C620A/CR620A/621A and 20-7Fh (Bank0) and

A0-BFh (Bank1) on the PIC16C622 and PIC16C622A are

general purpose registers implemented as static RAM.

Some special purpose registers are mapped in Bank 1.

Addresses F0h-FFh of bank1 are implemented as common

ram and mapped back to addresses 70h-7Fh in bank0 on

the PIC16C620A/CR620A/621A/622A.

4.2.1 GENERAL PURPOSE REGISTER FILE

The register file is organized as 80 x 8 in the

PIC16C620/621, 96 x 8 in the

PIC16C620A/621A/CR620A and 128 x 8 in the

PIC16C622(A). Each is accessed either directly or indi-

rectly through the File Select Register FSR

(Section 4.4).

DS30235G-page 14

Preliminary

© 1998 Microchip Technology Inc.

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