PIC16C65A/JW View Datasheet(PDF) - Microchip Technology
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PIC16C65A/JW Datasheet PDF : 108 Pages
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PIC16C62X
9.4.5 TIME-OUT SEQUENCE
On power-up the time-out sequence is as follows: First
PWRT time-out is invoked after POR has expired. Then
OST is activated. The total time-out will vary based on
oscillator configuration and PWRTE bit status. For
example, in RC mode with PWRTE bit erased (PWRT
disabled), there will be no time-out at all. Figure 9-9,
Figure 9-10 and Figure 9-11 depict time-out
sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 9-10). This is useful for testing purposes or
to synchronize more than one PIC16C62X device oper-
ating in parallel.
Table 9-6 shows the reset conditions for some special
registers, while Table 9-7 shows the reset conditions for
all the registers.
9.4.6 POWER CONTROL (PCON)/
STATUS REGISTER
The power control/status register, PCON (address
8Eh) has two bits.
Bit0 is BOR (Brown-out). BOR is unknown on
power-on-reset. It must then be set by the user and
checked on subsequent resets to see if BOR = 0
indicating that a brown-out has occurred. The BOR
status bit is a don’t care and is not necessarily
predictable if the brown-out circuit is disabled (by
setting BOREN bit = 0 in the Configuration word).
Bit1 is POR (Power-on-reset). It is a ‘0’ on
power-on-reset and unaffected otherwise. The user
must write a ‘1’ to this bit following a power-on-reset.
On a subsequent reset if POR is ‘0’, it will indicate that
a power-on-reset must have occurred (VDD may have
gone too low).
TABLE 9-3: TIME-OUT IN VARIOUS SITUATIONS
Oscillator Configuration
XT, HS, LP
RC
Power-up
PWRTE = 0
72 ms + 1024 TOSC
72 ms
PWRTE = 1
1024 TOSC
—
Brown-out Reset
72 ms + 1024 TOSC
72 ms
Wake-up
from SLEEP
1024 TOSC
—
TABLE 9-4: STATUS/PCON BITS AND THEIR SIGNIFICANCE
POR
BOR
TO
0
X
1
0
X
0
0
X
X
1
0
X
1
1
0
1
1
0
1
1
u
1
1
1
PD
1
Power-on-reset
X
Illegal, TO is set on POR
0
Illegal, PD is set on POR
X
Brown-out Reset
u
WDT Reset
0
WDT Wake-up
u
MCLR reset during normal operation
0
MCLR reset during SLEEP
Legend: u = unchanged, x = unknown
TABLE 9-5: SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on POR Value on all
Reset
other resets(1)
83h
STATUS
TO
PD
0001 1xxx
8Eh
PCON
—
—
—
—
—
—
POR
BOR
---- --0x
Note1: Other (non power-up) resets include MCLR reset, Brown-out Reset and Watchdog Timer Reset during normal operation.
000q quuu
---- --uq
© 1998 Microchip Technology Inc.
Preliminary
DS30235G-page 51
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