PIC16LC77T-04ESS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LC77T-04ESS

8-Bit CMOS Microcontrollers with A/D Converter

Microchip Technology 

PIC16C7X

TABLE 4-3: PIC16C76/77 SPECIAL FUNCTION REGISTER SUMMARY (Cont.’d)

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on: Value on all

POR, other resets

BOR

(2)

Bank 1

80h(4)

INDF

Addressing this location uses contents of FSR to address data memory (not a physical register)

0000 0000 0000 0000

81h

OPTION

RBPU INTEDG T0CS

T0SE

PSA

PS2

PS1

PS0 1111 1111 1111 1111

82h(4)

PCL

Program Counter's (PC) Least Significant Byte

0000 0000 0000 0000

83h(4)

STATUS

IRP

RP1

RP0

TO

PD

Z

DC

C

0001 1xxx 000q quuu

84h(4)

FSR

Indirect data memory address pointer

xxxx xxxx uuuu uuuu

85h

TRISA

—

— PORTA Data Direction Register

--11 1111 --11 1111

86h

TRISB

PORTB Data Direction Register

1111 1111 1111 1111

87h

88h(5)

89h(5)

8Ah(1,4)

8Bh(4)

8Ch

TRISC

TRISD

TRISE

PCLATH

INTCON

PIE1

PORTC Data Direction Register

PORTD Data Direction Register

IBF

OBF

IBOV

—

—

—

GIE

PSPIE(3)

PEIE

ADIE

T0IE

RCIE

1111 1111 1111 1111

1111 1111 1111 1111

PSPMODE

— PORTE Data Direction Bits

0000 -111 0000 -111

Write Buffer for the upper 5 bits of the Program Counter

---0 0000 ---0 0000

INTE

RBIE

T0IF

INTF

RBIF 0000 000x 0000 000u

TXIE

SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000

8Dh

PIE2

—

—

—

—

—

—

—

CCP2IE ---- ---0 ---- ---0

8Eh

PCON

—

—

—

—

—

—

POR

BOR ---- --qq ---- --uu

8Fh

—

Unimplemented

—

—

90h

—

Unimplemented

—

—

91h

—

Unimplemented

—

—

92h

PR2

Timer2 Period Register

93h

SSPADD Synchronous Serial Port (I2C mode) Address Register

1111 1111 1111 1111

0000 0000 0000 0000

94h

SSPSTAT

SMP

CKE

D/A

P

S

R/W

UA

BF

0000 0000 0000 0000

95h

—

Unimplemented

—

—

96h

—

Unimplemented

—

—

97h

—

Unimplemented

—

—

98h

TXSTA

CSRC

TX9

TXEN

SYNC

—

BRGH

TRMT

TX9D 0000 -010 0000 -010

99h

SPBRG Baud Rate Generator Register

0000 0000 0000 0000

9Ah

—

Unimplemented

—

—

9Bh

—

Unimplemented

—

—

9Ch

—

Unimplemented

—

—

9Dh

—

Unimplemented

—

—

9Eh

—

Unimplemented

—

—

9Fh

ADCON1

—

—

—

—

—

PCFG2 PCFG1 PCFG0 ---- -000 ---- -000

Legend:

Note 1:

2:

3:

4:

5:

x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0'.

Shaded locations are unimplemented, read as ‘0’.

The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose con-

tents are transferred to the upper byte of the program counter.

Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.

Bits PSPIE and PSPIF are reserved on the PIC16C76, always maintain these bits clear.

These registers can be addressed from any bank.

PORTD and PORTE are not physically implemented on the PIC16C76, read as ‘0’.

DS30390E-page 28

© 1997 Microchip Technology Inc.

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