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PIC16C73AT-10SP View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16C73AT-10SP
Microchip
Microchip Technology 
PIC16C73AT-10SP Datasheet PDF : 288 Pages
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PIC16C7X
TABLE 4-3: PIC16C76/77 SPECIAL FUNCTION REGISTER SUMMARY (Cont.’d)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on: Value on all
POR, other resets
BOR
(2)
Bank 2
100h(4)
INDF
101h
TMR0
102h(4)
PCL
103h(4)
STATUS
104h(4)
FSR
105h
106h
PORTB
107h
108h
109h
10Ah(1,4) PCLATH
10Bh(4) INTCON
10Ch-
10Fh
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 module’s register
Program Counter's (PC) Least Significant Byte
IRP
RP1
RP0
TO
PD
Z
DC
C
Indirect data memory address pointer
Unimplemented
PORTB Data Latch when written: PORTB pins when read
Unimplemented
Unimplemented
Unimplemented
— Write Buffer for the upper 5 bits of the Program Counter
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
Unimplemented
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---0 0000 ---0 0000
0000 000x 0000 000u
Bank 3
180h(4)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
0000 0000 0000 0000
181h
OPTION
RBPU INTEDG T0CS
T0SE
PSA
PS2
PS1
PS0 1111 1111 1111 1111
182h(4)
PCL
Program Counter's (PC) Least Significant Byte
0000 0000 0000 0000
183h(4)
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx 000q quuu
184h(4)
FSR
Indirect data memory address pointer
xxxx xxxx uuuu uuuu
185h
Unimplemented
186h
TRISB
PORTB Data Direction Register
1111 1111 1111 1111
187h
Unimplemented
188h
Unimplemented
189h
Unimplemented
18Ah(1,4) PCLATH
Write Buffer for the upper 5 bits of the Program Counter
---0 0000 ---0 0000
18Bh(4) INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000u
18Ch-
18Fh
Unimplemented
Legend:
Note 1:
2:
3:
4:
5:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0'.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose con-
tents are transferred to the upper byte of the program counter.
Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.
Bits PSPIE and PSPIF are reserved on the PIC16C76, always maintain these bits clear.
These registers can be addressed from any bank.
PORTD and PORTE are not physically implemented on the PIC16C76, read as ‘0’.
© 1997 Microchip Technology Inc.
DS30390E-page 29

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